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Concurrency control / Computer hardware / Spinlock / Interchangeable core / Lock / Parallel computing / Multi-core processor / AMD Phenom / CPU cache / Computing / Locksmithing / Gates


Non-scalable locks are dangerous Silas Boyd-Wickizer, M. Frans Kaashoek, Robert Morris, and Nickolai Zeldovich MIT CSAIL Abstract
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Document Date: 2015-03-27 16:16:57

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Markov / /

Company

AMD / Intel / Amdahl / /

Currency

pence / /

Event

Reorganization / /

IndustryTerm

directory-based cache coherence protocol / hardware cache coherence protocol / experimental hardware / mail server / inter-directory network / cache coherence protocol / x86-based multicore processors / /

MarketIndex

FOPS / /

OperatingSystem

Linux / K42 / GNU / L3 / /

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MIT / /

Person

Silas Boyd-Wickizer / Robert Morris / /

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waiter / representative / head / /

Product

x86 / Opteron / /

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C / /

Technology

Opteron chips / x86-based multicore processors / Linux / API / queueing theory / directory-based cache coherence protocol / hardware cache coherence protocol / operating system / virtual memory / operating systems / cache coherence protocol / /

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