![Reconfigurable computing / Field-programmable gate array / Block ciphers / AES implementations / DEAL / Xilinx / LEX / Advanced Encryption Standard process / CRYPTON / Cryptography / Advanced Encryption Standard / Data Encryption Standard Reconfigurable computing / Field-programmable gate array / Block ciphers / AES implementations / DEAL / Xilinx / LEX / Advanced Encryption Standard process / CRYPTON / Cryptography / Advanced Encryption Standard / Data Encryption Standard](https://www.pdfsearch.io/img/ed31dd0f321db04be8dac81c3b2d30dc.jpg)
| Document Date: 2007-11-14 11:11:18 Open Document File Size: 187,00 KBShare Result on Facebook
Company I.2 I.3 FPGA Resources / Xilinx / The AES / Jean-Didier Legat I.1 Hardware / / / Facility National Institute of Standards and Technology / port RAM / / IndustryTerm wireless communication / low cost encryption/decryption solutions / embedded hardware applications / / Organization National Institute of Standards and Technology / / Person Xavier Standaert / Jean-Jacques Quisquater / / Position Author / Colonel / / Region Levant / / TVStation Kbit / / Technology Encryption / block cipher / FPGA / RAM / Pay TV / Rijndael encryption / Integrated Circuits / Rijndael algorithm / / URL www.dice.ucl.ac.be\crypto / /
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