View Document Preview and Link
Document Date: 2007-04-26 16:43:20 Open Document File Size: 311,03 KB Share Result on Facebook
City Orlando / Ottawa / Austin / Boston / New York / Charleston / San Diego / San Jose / / Company IBM / Intel Corporation / / Country Canada / / Currency USD / / / Facility Stanford University / / IndustryTerm Online Bibliography / larger applications / multicore chips / plausible solution / software development process / software transactional memory system / stock hardware / transactional memory entirely in software / software implementations / software components / software modules / software engineering practices / software mode / coherence protocol / software transactional memory / parallel programming technologies / multicore processors / parallel applications / multicore hardware / parallel hardware / efficient software / mainstream software development / software revolution / software mechanism / Early systems / high-productivity computing system / cache coherence protocol / parallel computer systems / hardware technologies / / Organization Programming Systems Lab / STANFORD UNIVERSITY / / Person Cao Minh / CHRISTOS KOZYRAKIS / Tim Sweeney / Herb Sutter / Hudson / James Larus / / Position guard / system designer / senior staff researcher / www.acmqueue.com head / assistant professor of electrical engineering and computer science / garbage collector / assistant professor of electrical engineering / principal engineer / programmer / Cao / / ProgrammingLanguage Java / / PublishedMedium ACM QUEUE / / SportsLeague Stanford University / / Technology symmetric multiprocessing / multicore chips / API / parallel programming technologies / multicore processors / operating system / shared memory / Operating Systems / cache coherence protocol / hardware technologies / IA-32 processors / Java / coherence protocol / http / paging / simulation / virtual memory / / URL www.acmqueue.com/forums / http /