INESC-ID

Results: 423



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31GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection G. Falcao, J. Andrade, V. Silva and L. Sousa A new strategy is proposed for implementing computationally intensive high-throughput decoder

GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection G. Falcao, J. Andrade, V. Silva and L. Sousa A new strategy is proposed for implementing computationally intensive high-throughput decoder

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Source URL: www.inesc-id.pt

Language: English - Date: 2011-05-15 06:58:54
    32International Journal of Networking and Computing – www.ijnc.org ISSNprint) ISSNonline) Volume 1, Number 1, pages 96–113, January 2011 CHPS: An Environment for Collaborative Execution on Heter

    International Journal of Networking and Computing – www.ijnc.org ISSNprint) ISSNonline) Volume 1, Number 1, pages 96–113, January 2011 CHPS: An Environment for Collaborative Execution on Heter

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    Source URL: www.inesc-id.pt

    Language: English - Date: 2015-03-03 11:03:45
      33Paulo Ferreira Paulo Ferreira holds a PhD from the Université Pierre et Marie Curiein Computer Science. His MScand BScare both from Instituto Superior Técnico (Technical University of Lisbon) in

      Paulo Ferreira Paulo Ferreira holds a PhD from the Université Pierre et Marie Curiein Computer Science. His MScand BScare both from Instituto Superior Técnico (Technical University of Lisbon) in

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      Source URL: www.gsd.inesc-id.pt

      - Date: 2014-12-30 09:16:25
        34PhD fellowship on Quantum-Resistant Trusted Platform Modules We are seeking applications for PhD students to work in the Signal Processing System Group of INESC-ID on the EU Horizon2020-funded FutureTPM project. The goal

        PhD fellowship on Quantum-Resistant Trusted Platform Modules We are seeking applications for PhD students to work in the Signal Processing System Group of INESC-ID on the EU Horizon2020-funded FutureTPM project. The goal

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        Source URL: sips.inesc-id.pt

        - Date: 2017-12-27 12:21:57
          35PHyTM: Persistent Hybrid Transactional Memory Hillel Avni Trevor Brown Huawei Technologies

          PHyTM: Persistent Hybrid Transactional Memory Hillel Avni Trevor Brown Huawei Technologies

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          Source URL: www.gsd.inesc-id.pt

          - Date: 2016-03-08 09:07:57
            36PATMOS2008 International Workshop on Power and Timing Modeling, Optimization and Simulation Lisbon, Portugal ▪ September 10-12, 2008

            PATMOS2008 International Workshop on Power and Timing Modeling, Optimization and Simulation Lisbon, Portugal ▪ September 10-12, 2008

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            Source URL: algos.inesc-id.pt

            - Date: 2007-09-27 20:06:00
              37The Influence of Malloc Placement on TSX Hardware Transactional Memory Alex Kogan Tim Harris

              The Influence of Malloc Placement on TSX Hardware Transactional Memory Alex Kogan Tim Harris

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              Source URL: www.gsd.inesc-id.pt

              - Date: 2016-03-13 13:04:24
                38The Mimir Approach to Transactional Output Tingzhe Zhou and Michael Spear Lehigh University {tiz214, spear}@cse.lehigh.edu Abstract

                The Mimir Approach to Transactional Output Tingzhe Zhou and Michael Spear Lehigh University {tiz214, spear}@cse.lehigh.edu Abstract

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                Source URL: www.gsd.inesc-id.pt

                - Date: 2016-05-03 05:56:33
                  39Lock Holder Preemption Avoidance via Transactional Lock Elision Dave Dice Tim Harris

                  Lock Holder Preemption Avoidance via Transactional Lock Elision Dave Dice Tim Harris

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                  Source URL: www.gsd.inesc-id.pt

                  - Date: 2016-03-13 13:03:28
                    40On Extending TM Primitives using Low Level Semantics Mohamed M. Saad, Roberto Palmieri, Ahmed Hassan, and Binoy Ravindran {msaad, robertop, hassan84, binoy}@vt.edu ECE Dept., Virginia Tech, Blacksburg, VA 24061, US Abst

                    On Extending TM Primitives using Low Level Semantics Mohamed M. Saad, Roberto Palmieri, Ahmed Hassan, and Binoy Ravindran {msaad, robertop, hassan84, binoy}@vt.edu ECE Dept., Virginia Tech, Blacksburg, VA 24061, US Abst

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                    Source URL: www.gsd.inesc-id.pt

                    - Date: 2016-03-18 19:06:01