Localized Microarchitecture-Level Voltage Management YongKang Zhu David H. Albonesi

Source URL: www.csl.cornell.edu

Dynamically Matching ILP Characteristics Via a Heterogeneous Clustered Microarchitecture Lei Chen, David H. Albonesi, Steven Dropsho† Department of Electrical and Computer Engineering †Department of Computer Science

Source URL: www.csl.cornell.edu

Profiling R on a Contemporary Processor Shriram Sridharan Jignesh M. Patel University of Wisconsin–Madison

Source URL: quickstep.cs.wisc.edu

• Central processing unit
• Memory management
• Computer memory
• CPU cache
• Cache
• Compiler optimization
• Garbage collection
• Microarchitecture
• Cell
• Computer architecture
• Computer hardware
• Computing

Improving Low Power Processor Efficiency with Static Pipelining Ian Finlayson† , Gang-Ryung Uh‡ , David Whalley† and Gary Tyson† † ‡

Source URL: www.cs.fsu.edu

• Central processing unit
• Compiler optimizations
• Classes of computers
• Instruction set architectures
• Software pipelining
• Instruction pipeline
• Reduced instruction set computing
• MIPS architecture
• Microarchitecture
• Computer architecture
• Computing
• Computer engineering

Appears in the Proceedings of 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’12) Architecture Support for Disciplined Approximate Programming Hadi Esmaeil

Source URL: homes.cs.washington.edu

• Computer engineering
• Instruction set architectures
• Microarchitecture
• Microprocessors
• Register file
• Instruction set
• DEC Alpha
• CPU cache
• Cell
• Computer architecture
• Computer hardware
• Central processing unit

Bulk Disambiguation of Speculative Threads in Multiprocessors∗ Luis Ceze, James Tuck, C˘alin Cas¸caval† and Josep Torrellas University of Illinois at Urbana-Champaign {luisceze, jtuck, torrellas}@cs.uiuc.edu http:/

Source URL: homes.cs.washington.edu

• Computing
• Microprocessors
• Threads
• Parallel computing
• CPU cache
• Computer memory
• Multithreading
• Microarchitecture
• Threading
• Computer hardware
• Computer architecture
• Central processing unit

A Retrospective on the Dorado, A High-Performance Personal Computer Kenneth A. Pier A Retrospective on the Dorado, A High-Performance Personal Computer

Source URL: www.textfiles.com

• Computer engineering
• Microcode
• Xerox Alto
• Instruction set
• Computer data storage
• Microarchitecture
• Memory bandwidth
• Emulator
• PDP-10
• Computer architecture
• Computer hardware
• Central processing unit

Techniques for Benchmarking of CPU Micro-Architecture for Performance Evaluation Varad Deshmukh∗1 , Nishchay Mhatre∗1 , and Shrirang K. Karandikar2 1 2

Source URL: www.hipc.org

• Computing
• Benchmark
• CPU cache
• Branch predictor
• NetBurst
• Standard Performance Evaluation Corporation
• Computer performance
• Microarchitecture
• AMD 10h
• Central processing unit
• Computer hardware
• Computer architecture

Appears in the Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012 Neural Acceleration for General-Purpose Approximate Programs Hadi Esmaeilzadeh Adrian Sampson

Source URL: homes.cs.washington.edu

• Computational statistics
• Statistics
• Science
• Artificial neural network
• Types of artificial neural networks
• Artificial neuron
• Perceptron
• Backpropagation
• Fast Fourier transform
• Neural networks
• Computational neuroscience
• Cybernetics

Towards a Performance- and Energy-Efficient Data Filter Cache Alen Bardizbanyan Magnus Själander

Source URL: www.cs.fsu.edu

• Computer memory
• Cache
• Computer architecture
• CPU cache
• Translation lookaside buffer
• Microarchitecture
• Memory hierarchy
• Lookup table
• Scratchpad memory
• Computer hardware
• Computing
• Central processing unit