Reconfigurable Hardware Implementation of Mesh Routing in the Number Field Sieve Factorization Sashisu Bajracharya1, Deapesh Misra1, Kris Gaj1, Tarek El-Ghazawi2 1

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Date: 2005-03-13 11:15:52 Algebra Linear algebra Mathematics Numerical linear algebra Matrix theory Integer factorization algorithms Multiplication Reconfigurable computing Field-programmable gate array Matrix Virtex Xilinx		Reconfigurable Hardware Implementation of Mesh Routing in the Number Field Sieve Factorization Sashisu Bajracharya1, Deapesh Misra1, Kris Gaj1, Tarek El-Ghazawi2 1 Add to Reading List Source URL: www.hyperelliptic.org Download Document from Source Website File Size: 338,95 KB Share Document on Facebook

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