| Document Date: 2013-12-23 07:16:59
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Company Xilinx / / / Facility Cache/Scratchpad Pipeline / Xiaojun Yang Institute of Computer Science / / IndustryTerm command protocol / purpose systems / command completion hardware / individual processors / systems / real-time applications / search req grant / runtime systems / multiprocessor systems / software nofitication / remote processors / less hardware / larger scale systems / multicore computing systems / user software demand / / MarketIndex TLB / / Organization HiPEAC / Xiaojun Yang Institute of Computer Science / NI Command / / Person Directly Cacheable Addressable (Scratchpad) / Job List / George Nikiforos / / Position Cache Controller / L2 controller / DRAM memory controller / NI controller / integrated CC/NI controller / producer / DRAM controller / programmer / / Product L2 / MicroBlaze / / Technology FPGA / four MicroBlaze processors / command protocol / caching / SDRAM / SRAM / shared memory / CMP / /
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Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pnevmatikatos