| Document Date: 2013-12-23 07:16:59
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City Houston / Santa Barbara / Jerusalem / Austin / Tokyo / Delft / Tampa / Cache / San Jose / / Company IBM / Embedded Comp / Embedded Systems / L2 / Xilinx / / Country Netherlands / Japan / Israel / Greece / / / Facility Store Buff / Store Instruction Generalization / Xiaojun Yang Institute of Computer Science / / IndustryTerm on-chip network / command completion hardware / individual processors / cache bank / real-time applications / back-end tools / multiprocessor systems / less hardware / multicore computing systems / user software demand / command protocol / purpose systems / systems / bank conflict / bank / runtime systems / remote processors / software control / / Organization CPU ART / Xiaojun Yang Institute of Computer Science / NI Command / HiPEAC / European Commission / Stanford / / Person Christos Sotiriou / Euriclis Kounalakis / Dimitris Nikolopoulos / T.N. Vijaykumar / Alex Ramirez / K. Roy / M.D. Powell / A. Agarwal / J. Kubiatowicz / Georgi Gaydadjiev / Michael Ligerakis / Spyros Lyberis / Dimitris Tsaliagos / B. Falsafi / George Nikiforos / / Position Cache Controller / off-chip DDR memory controller / net Incoming NI Compl Monitor Arbiter / integrated CC/NI controller / producer / store-and-forward / integrated CC/NI controller / c IEEE Proc / interface and cache controller / Programming Model for the Cell BE Architecture / DRAM controller / controller / integrated NI/cache controller / / Product Cache/Scratchpad / MicroBlaze / / ProvinceOrState Texas / Florida / Colorado / / Technology FPGA / four MicroBlaze processors / SRAM / operating system / shared memory / CMP / User-Level Network Interface Protocols / command protocol / Programmable Stream Processors / caching / SDRAM / Simulation / TRIPS Prototype Processor / Flash / Parallel Processing / local processor / /
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FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne