| Document Date: 2002-01-09 12:40:54
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Company Xilinx Inc. / National Semiconductor / CSC / / / Facility S.M. Wang University of Florida A. Atamanchuk / / IndustryTerm track-finding algorithm / software support testing / size reduction using state-of-the-art technology / backplane technology / prototype track-finding processor / pre-processing / identical processors / / NaturalFeature Latency Latency Channel / / OperatingSystem Microsoft Windows / / Organization Extrapolation Unit / Final Section Unit / US Federal Reserve / S.M. Wang University of Florida A. Atamanchuk / Final Selection Unit / / Position Muon Sorter CCB BIT3 Controller / / ProgrammingLanguage Verilog / C / C++ / / SportsEvent ufl / / Technology FPGA / one chip / 9 Track Assembler units Sector Processor / 12 identical processors / sorting processor / track-finding algorithm / V. SECTOR PROCESSOR ALGORITHM AND C++ MODEL MODIFICATIONS The Sector Processor algorithm / Sector Processor algorithm / Verilog / 12 Sector Processors / The algorithms / JAVA / one Sector Processor / 3-dimentional Sector Processor algorithm / JTAG / prototype track-finding processor / SRAM / GTLP backplane technology / trackfinding algorithms / operating systems / GUI / 1 To Muon Sorter Sector Processor / prototype Sector Processor / implemented using SRAM / / URL www.xilinx.com / /
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The Track-Finding Processor for the Level-1 Trigger of the CMS Endcap Muon System D. Acosta, A. Madorsky (), B. Scurlock, S.M. Wang University of Florida A. Atamanchuk, V. Golovtsov, B. Razmyslovich,