Back to Results
First PageMeta Content
Computing / System software / Lock / Software transactional memory / Linearizability / Transactional memory / Scalability / Transactional Synchronization Extensions / Parallel computing / Transaction processing / Concurrency control / Data management


Self-Tuning Intel Transactional Synchronization Extensions Nuno Diegues and Paolo Romano, INESC-ID and Instituto Superior Técnico, University of Lisbon https://www.usenix.org/conference/icac14/technical-sessions/present
Add to Reading List

Open Document

File Size: 487,92 KB

Share Result on Facebook

City

Philadelphia / /

Company

Intel / Facebook / /

/

Event

FDA Phase / /

Facility

TM library / /

IndustryTerm

real tuning algorithm / software fallback path / in-memory web cache / software handler / parallel applications / software fallback / self-tuning solution / offline solutions / transactional applications / adaptive solution / art solution / typical irregular applications / software implementations / realistic transactional applications / scale web page servicing / descent search / mainstream commercial processors / i.e. contention management / lightweight profiling tool / search space / cache coherence protocol / online monitoring / gradient descent algorithms / software-based fallback / learning algorithm / memslap tool / /

MarketIndex

STAMP / /

OperatingSystem

Ubuntu / Gnu / /

Organization

University of Lisbon Abstract / RTM HLE / Instituto Superior T´ecnico / US Federal Reserve / Instituto Superior Técnico / University of Lisbon / Autonomic Computing USENIX Association / USENIX Association / /

Person

Paolo Romano / Nuno Diegues / /

Position

guard the global lock acquisition / fallback manager / manager preventing hardware transactions / representative / programmer / /

Product

Transactional Memory / Memcached / L1 / /

ProgrammingLanguage

C++ / /

Technology

EURISTIC algorithm / 215 Algorithm / learning algorithm / proposed algorithm / real tuning algorithm / Haswell processors / gradient descent algorithms / Haswell Xeon E3-1275 processor / shared memory / cache coherence protocol / /

URL

www.usenix.org/conference/icac14/technical-sessions/presentation/diegues / /

SocialTag