Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) A Loop Acceleration Technique to Speed Up Verification of Automatically-Generated Plans Robert P. Goldman and Michael J.S. Pelican an

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Date: 2013-06-12 10:51:30 Applied mathematics Computer science Model checking Formal verification Finite-state machine Deterministic finite automaton Automated planning and scheduling Uppaal Model Checker Clock Models of computation Automata theory Theoretical computer science		Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) A Loop Acceleration Technique to Speed Up Verification of Automatically-Generated Plans Robert P. Goldman and Michael J.S. Pelican an Add to Reading List Source URL: rpgoldman.goldman-tribe.org Download Document from Source Website File Size: 721,70 KB Share Document on Facebook

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