Refining the Utility Metric for Utility-Based Cache Partitioning ∗ Xing Lin, Rajeev Balasubramonian School of Computing, University of Utah Abstract It is expected that future high-performance processors - Cache High School - Document - PDFSEARCH.IO

First Page	Meta Content
	Refining the Utility Metric for Utility-Based Cache Partitioning ∗ Xing Lin, Rajeev Balasubramonian School of Computing, University of Utah Abstract It is expected that future high-performance processors Add to Reading List Document Date: 2011-09-25 02:50:52 Open Document File Size: 107,49 KB Share Result on Facebook Company Intel / HP / / Country Sudan / / Facility University of Utah / University of Utah Abstract It / / IndustryTerm Online Optimizations / instruction window processor / energy / / MarketIndex IPC / CPI estimations across the entire / / OperatingSystem L3 / / Organization University of Utah Abstract It / University of Utah / Rajeev Balasubramonian School of Computing / National Science Foundation / / Person Xing Lin / Cho / Jin / / Position Co-Operative / / ProgrammingLanguage Perl / / ProvinceOrState Utah / / Technology Adaptive On-Chip / Cache Memory / 128-entry instruction window processor / Perl / Multicore Processors / simulation / Operating System / Quality of Service / CMP / / SocialTag Computer architecture Parallel computing Microprocessors Cache CPU cache Speedup Computer performance Lookup table Microarchitecture Computing

Refining the Utility Metric for Utility-Based Cache Partitioning ∗ Xing Lin, Rajeev Balasubramonian School of Computing, University of Utah Abstract It is expected that future high-performance processorsAdd to Reading List