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Computing / Data / Transactional memory / Software transactional memory / Linearizability / Snapshot / Cache / Rock / Transaction processing / Concurrency control / Data management


Hardware Support for Unbounded Transactional Memory by Sean Lie
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Document Date: 2014-09-16 08:27:50


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File Size: 581,34 KB

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Company

Silicon Graphics Incorporated. / Charles E. Leiserson / Krste Asanovic / Bradley C. Kuszmaul / /

Facility

University of Utah / Massachusetts Institute of Technology May / Massachusetts Institute of Technology / /

IndustryTerm

hardware transactional systems / hardware systems / cache coherency protocol / software transaction system / hardware transactional memory systems / software designs / hardware-software approach / /

Organization

University of Utah / National Science Foundation / Singapore-MIT Alliance / Massachusetts Institute of Technology / Department of Electrical Engineering and Computer Science / Department Committee on Graduate Theses / /

Person

Sean Lie Submitted / Arthur C. Smith / Steve Miller / MIT CSAIL / C. Scott Ananian / Jennifer Song / Marty Deneroff / Lixin Zhang / /

Position

lead software engineer / dedicated advisor / author / Chairman / Associate Professor / /

ProvinceOrState

Utah / Massachusetts / /

RadioStation

Work 29 / /

Technology

cache coherency protocol / 6 Processor / simulation / 52 4.6 Processor / /

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