| Document Date: 2011-08-12 16:48:38
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Company Altera / RTL / / / Event Force Majeure / / Facility Functional Programming Workshop University of Chicago Technical Report TR-2006-06 / Indiana University / / IndustryTerm partition systems / quicksort algorithm / synchronization protocol / hardware/software co-design / embedded systems / portable devices / hardware/software co-design methodologies / hardware/software / car function / space constrained applications / car pair / dataflow parallel hardware / possible call site / pure software model / equivalent software version / function allocation site / synthesis tool / hardware architectures using software / function call site / reconfigurable chips / produced several tools / software components / typical software compilers / software developers / synthesis tools / desirable solution / lower-level processing tasks / energy / non-trivial algorithms / parallel hardware / software implementation / higher-level and more complex processing logic / call site / hardware/software interfaces / sequential algorithm / software programs / given call site / mergesort algorithms / early systems / handshake protocol / software program / mergesort algorithm / generic hardware / / NaturalFeature I/O channel / / Organization Indiana University / Scheme and Functional Programming Workshop University of Chicago Technical Report TR-2006-06 / US Federal Reserve / / Person Jean-Pierre David Université de Montréal / Marc Feeley Jean-Pierre / / / Position arbiter / full garbage collector / garbage collector / programmer / / Product Pentax K-x Digital Camera / / ProgrammingLanguage Haskell / / Technology Functional Programming / FPGA / RAM / quicksort algorithm / mergesort algorithm / VHDL / SHA-1 hashing algorithm / Finite State Machine / four-phase handshake protocol / synchronization protocol / simulation / non-trivial algorithms / mergesort algorithms / /
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SHard: a Scheme to Hardware Compiler Xavier Saint-Mleux Marc Feeley Jean-Pierre David