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SystemC
Results: 132

#	Item
21	PDF Document Add to Reading List Source URL: www.systemc.co.jp - Date: 2009-07-31 02:51:38
22	RICE UNIVERSITY Dynamic Assertion-Based Verification for SystemC by Deian Tabakov A Thesis Submitted Add to Reading List Source URL: www.cs.rice.edu Language: English - Date: 2010-10-21 14:08:57
23	Monitoring Temporal SystemC Properties Deian Tabakov Moshe Y. VardiMain Str. MS-132 Add to Reading List Source URL: www.cs.rice.edu Language: English - Date: 2010-05-27 23:54:13
24	Advancing system-level verification using UVM in SystemC Martin Barnasconi, NXP Semiconductors François Pêcheux, University Pierre and Marie Curie Thilo Vörtler, Fraunhofer IIS/EAS Add to Reading List Source URL: www.accellera.org Language: English - Date: 2015-05-14 17:26:29
25	Assertion-Based Flow Monitoring of SystemC Models Sonali Dutta Moshe Y. Vardi Add to Reading List Source URL: www.cs.rice.edu Language: English - Date: 2014-08-26 15:23:08 Mathematics Aerodynamics SystemC Flow network Fluid dynamics Ford–Fulkerson algorithm Maximum flow problem Network flow Electronic engineering Graph theory
26	CyberWorkBench® High-Level Synthesis and Verification by: SystemC High-Level Synthesis and Verification Add to Reading List Source URL: www.aldec.com Language: English - Date: 2013-08-07 16:44:00 Fabless semiconductor companies Hardware description languages Logic design Aldec Field-programmable gate array Xilinx High-level synthesis Altera SystemC Electronic engineering Digital electronics Electronic design automation
27	Riviera-PRO™ Advanced Verification Verification Platform Riviera-PRO™ addresses verification needs of engineers crafting tomorrow’s cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench pro Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-05-05 17:04:52 Hardware verification languages Aldec Logic design SystemVerilog Verilog SystemC VHDL E Simulink Electronic engineering Hardware description languages Electronic design automation
28	Homa Alemzadeh 246 Coordinated Science Lab, MC 228 CONTACT INFORMATION 1308 W. Main St. Urbana, IL 61801 Add to Reading List Source URL: users.crhc.illinois.edu Language: English - Date: 2015-05-01 15:47:10 Biomedical engineering Medical equipment Institute of Electrical and Electronics Engineers Medical device Robotic surgery SystemC University of Illinois at Urbana–Champaign IEEE Engineering in Medicine and Biology Society Medicine Technology Standards organizations
29	High-level Analysis for Reconfiguration of a Fault Tolerant Mesh-based NoC Architecture Using Transaction Level Modeling Homa Alemzadeh1, Fatemeh Refan1, Paolo Prinetto2, Zainalabedin Navabi1 1 CAD Research Laboratory Add to Reading List Source URL: users.crhc.illinois.edu Language: English - Date: 2015-05-01 15:47:10 SystemC Transaction-level modeling Network switch Routing Fault-tolerant system Transmission Control Protocol Electronic engineering Electronic design automation Network On Chip
30	Titre du stage : Approche structurelle pour produire des modèles de simulation SystemC-TLM d’architectures matérielles intégrant des descriptions de systèmes de gestion de puissance. Durée du Stage : 6 mois Date d Add to Reading List Source URL: leat.unice.fr Language: French - Date: 2015-01-16 12:27:13