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SystemC
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#	Item
51	LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level M. Moy STMicroelectronics, Verimag Add to Reading List Source URL: www-verimag.imag.fr Language: English - Date: 2005-05-13 07:59:35 Hardware verification languages SystemC High-level synthesis Dataflow programming E SpecC Scheduling Catapult C Transaction-level modeling Electronic engineering Electronic design automation Hardware description languages
52	Using JTAG with SystemC Implementation of a Cycle Accurate Interface Jeremy Bennett Embecosm Application Note 5. Issue 1 Add to Reading List Source URL: www.embecosm.com Language: English - Date: 2013-01-16 23:54:46 Electronics IEEE standards Embedded systems Joint Test Action Group Boundary scan Microcontrollers SystemC IEEE Standards Association Shift register Electronics manufacturing Electronic engineering Manufacturing
53	Synopsys Hybrid Prototyping Solution `` Integrates Virtual and FPGA-Based Prototypes `` Start multicore SoC prototyping earlier Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-06 15:46:48 Field-programmable gate array Synopsys SystemC Prototype Embedded system Catapult C Hardware emulation Electronic engineering Electronic design automation FPGA prototype
54	INSTITUT NATIONAL POLYTECHNIQUE DE GRENOBLE THESIS To obtain the grade of INPG DOCTOR Speciality: « COMPUTER SYSTEMS AND COMMUNICATIONS » Add to Reading List Source URL: www-verimag.imag.fr Language: English - Date: 2009-09-03 04:49:14 Model checking Parallel computing E Electronic engineering Hardware verification languages SystemC
55	Profiled Model Based Power Simulator for Side Channel Evaluation Nicolas Debande1,2 , Ma¨el Berthier1 , Yves Bocktaels1 and Thanh-Ha Le1 1 Morpho Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2012-12-16 09:22:52 Instruction set architectures Logic design SystemC Simulation Microcontroller Logic simulation ARM architecture Electronic engineering Digital electronics Electronic design automation
56	Datasheet VCS Xprop Increasing the Efficiency of X-related Simulation and Debug Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:23 Hardware verification languages Digital electronics Verilog VHDL Logic simulation Register-transfer level SystemC Logic synthesis Synopsys Electronic engineering Electronic design automation Hardware description languages
57	Datasheet Galaxy Custom Designer SE The New Choice in Custom Schematic Editing and Simulation Environment Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:15 SPICE Electronic circuit simulation Simulation SystemC Silvaco Electronic engineering Electronic design automation Software
58	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-29 15:47:57 VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation
59	Microsoft Word - quf_abstract-1.docx Add to Reading List Source URL: adt.cs.upb.de Language: English - Date: 2011-03-03 07:31:46 Instruction set architectures QEMU Q SystemC Binary translation Emulator Virtual machine X86 ARM architecture System software Software Computing
60	Datasheet Vehicle Powernet Design Synopsys’ Saber® provides a complete design and verification solution for vehicle power networks Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-28 08:15:39 Operations research Simulation SPICE Synopsys Reliability engineering Power network design SystemC Electronic engineering Electronic design automation Software